Chih-Da Chien

According to our database, Chih-Da Chien authored at least 14 papers between 2002 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications.

Chi-Cheng Ju, Tsu-Ming Liu, Kun-Bin Lee, Yung-Chang Chang, Han-Liang Chou, Chih-Ming Wang, Tung-Hsing Wu, Hue-Min Lin, Yi-Hsin Huang, Chia-Yun Cheng, Ting-An Lin, Chun-Chia Chen, Yu-Kun Lin, Min-Hao Chiu, Wei-Cing Li, Sheng-Jen Wang, Yen-Chieh Lai, Ping Chao, Chih-Da Chien, Meng-Jye Hu, Peng-Hao Wang, Yen-Chao Huang, Shun-Hsiang Chuang, Lien-Fei Chen, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen

IEEE J. Solid State Circuits, 2016

2015

18.6 A 0.5nJ/pixel 4K H.265/HEVC codec LSI for multi-format smartphone applications.

Chi-Cheng Ju, Tsu-Ming Liu, Kun-Bin Lee, Yung-Chang Chang, Han-Liang Chou, Chih-Ming Wang, Tung-Hsing Wu, Hue-Min Lin, Yi-Hsin Huang, Chia-Yun Cheng, Ting-An Lin, Chun-Chia Chen, Yu-Kun Lin, Min-Hao Chiu, Wei-Cing Li, Sheng-Jen Wang, Yen-Chieh Lai, Ping Chao, Chih-Da Chien, Meng-Jye Hu, Peng-Hao Wang, Fu-Chun Yeh, Yen-Chao Huang, Shun-Hsiang Chuang, Lien-Fei Chen, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen, Ryan Chen, H. Y. Hsu, Kevin Jou

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2009

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications.

Chih-Da Chien, Cheng-An Chien, Jui-Chin Chu, Jiun-In Guo, Ching-Hwa Cheng

ACM Trans. Design Autom. Electr. Syst., 2009

A Multi-standard Video Decoder for High Definition Video Applications.

Cheng-An Chien, Chih-Da Chien, Jui-Chin Chu, Jiun-In Guo, Ching-Hwa Cheng

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007

A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications.

Chih-Da Chien, Chien-Chang Lin, Yi-Hung Shih, He-Chun Chen, Chia-Jui Huang, Cheng-Yen Yu, Chih-Liang Chen, Ching-Hwa Cheng, Jiun-In Guo

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A Memory-Based Hardware Accelerator for Real-Time MPEG-4 Audio Coding and Reverberation.

Guo-An Jian, Chih-Da Chien, Jiun-In Guo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Low Latency Memory Controller for Video Coding Systems.

Chih-Da Chien, Chih-Wei Wang, Chiun-Chau Lin, Tien-Wei Hsieh, Yuan-Hwa Chu, Jiun-In Guo

Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007

2006

An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications.

Chih-Da Chien, Keng-Po Lu, Yu-Min Chen, Jiun-In Guo, Yuan-Sun Chu, Ching-Lung Su

IEEE Trans. Circuits Syst. Video Technol., 2006

A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications.

Chih-Da Chien, Keng-Po Lu, Yi-Hung Shih, Jiun-In Guo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

A low-power motion compensation IP core design for MPEG-1/2/4 video decoding.

Chih-Da Chien, Ho-Chun Chen, Lin-Chieh Huang, Jiun-In Guo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

A power-aware IP core generator for the one-dimensional discrete Fourier transform.

Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A high-performance MPEG4 bitstream processing core.

Tai-Lun Chang, Ying-Ming Tsai, Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo

Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

2003

A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining.

Jiun-In Guo, Chih-Da Chien, Chien-Chang Lin

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths.

Jiun-In Guo, Chien-Chang Lin, Chih-Da Chien

J. Circuits Syst. Comput., 2002