Chih-Chi Chang

Orcid: 0000-0003-3634-8407

According to our database1, Chih-Chi Chang authored at least 7 papers between 1987 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2021
Minimizing Response Time for MapReduce Applications on In-Storage Processing Architecture.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

2014
High-frequency and power-efficiency ultrasound beam-forming processor for handheld applications.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

1999
A neural network controller based on the rule of bang-bang control.
Proceedings of the International Joint Conference Neural Networks, 1999

A neural-fuzzy controller with heterogeneous neurons.
Proceedings of the International Joint Conference Neural Networks, 1999

1994
A New Algorithm and its VLSI Architecture Design for Connected Component Labelling.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1990
On the Design of VLSI Architectures for Parallel Execution of DO Loops.
J. Parallel Distributed Comput., 1990

1987
Iteration-Level Parallel Execution of DO Loops with a Reduced Set of Dependence Relations.
J. Parallel Distributed Comput., 1987


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