Chien-Tung Liu

According to our database, Chien-Tung Liu authored at least 5 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 40-nm 13.88-TOPS/W FC-DNN Engine for 16-bit Intelligent Audio Processing Featuring Weight-Sharing and Approximate Computing.

Tay-Jyi Lin, Ze Li, Yun-Cheng Chen, Chien-Tung Liu, Tien-Fu Chen, Jinn-Shyan Wang

Proceedings of the 36th IEEE Hot Chips Symposium, 2024

2020

Low-Active-Energy and Low-Standby-Power Sub-threshold ROM for IoT Edge Sensing Systems.

Jinn-Shyan Wang, Chien-Tung Liu, Chao-Hsiang Wang

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A 0.21V 40nm NAND-ROM for IoT Sensing Systems with Long Standby Periods.

Jinn-Shyan Wang, Cheng-Xin Xue, Chien-Tung Liu, Tay-Jyi Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018

A Low-Area, Low-Power, and Low-Leakage Error-Detecting Latch for Timing-Error Resilient System Designs.

Chien-Tung Liu, Zhe-Wei Chang, Shih-Nung Wei, Jinn-Shyan Wang, Tay-Jyi Lin

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

Near-Threshold CORDIC Design with Dynamic Circuitry for Long-Standby IoT Applications.

Pei-Yuan Chou, Ya-Bei Fang, Bo-Hao Chen, Chien-Tung Liu, Tay-Jyi Lin, Jinn-Shyan Wang

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018