Chien-Hung Tsai

Orcid: 0000-0003-4282-8052

According to our database1, Chien-Hung Tsai authored at least 35 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2024
10MHz Half-Bridge GaN Driver IC with Dual-edge Dead-Time Control.
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024

A Digital PSR Flyback Adapter in CCM/DCM with Midpoint detection.
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024

2023
Mixed-Level Design Methodology With SystemVerilog Behavior Models for Digitally Controlled Power Converter ICs.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

A Novel Cost Effective Variable On-Time Control of Digital Boost PFC Converter in Boundary Conduction Mode.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

A Wide Load Range and Low Current Distortion Digital Boost PFC Converter With Mixed Conduction Mode Operation.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

2022
Time-Lagged Ensemble Quantitative Precipitation Forecasts for Three Landfalling Typhoons in the Philippines Using the CReSS Model, Part II: Verification Using Global Precipitation Measurement Retrievals.
Remote. Sens., 2022

2021
Fully Digital Current Mode Constant On-Time Controlled Buck Converter With Output Voltage Offset Cancellation.
IEEE Access, 2021

2020
Digital Battery Management Design for Point-of-Load Applications With Cell Balancing.
IEEE Trans. Ind. Electron., 2020

A Digital Power Factor Controller for Primary-Side-Regulated LED Driver.
IEEE Access, 2020

2019
All-Digital Current-Sensorless Multi-Mode DC-DC Converter for Battery Powered Applications.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

2018
A digital peak current delay compensation for primary-side regulation flyback adapter.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

Digital Buck Converter with Adaptive Driving Circuit for Cascode Power MOS.
Proceedings of the IEEE 7th Global Conference on Consumer Electronics, 2018

Mixed-Level Design Methodology for Digitally Controlled Power Converter IC.
Proceedings of the IEEE 7th Global Conference on Consumer Electronics, 2018

A Digital Multiphase Converter with Sensor-less Current and Thermal Balance Mechanism.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
Digital Noninverting-Buck-Boost Converter With Enhanced Duty-Cycle-Overlap Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Quasi-V<sup>2</sup> hysteretic control boost DC-DC regulator with synthetic current ripple technique.
Int. J. Circuit Theory Appl., 2017

A digitally controlled buck converter with current sensor-less adaptive voltage positioning (AVP) mechanism.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

2016
High power factor boost PFC controller with feedforward adaptive on-time control.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
A Stable Mode-Transition Technique for a Digitally Controlled Non-Inverting Buck-Boost DC-DC Converter.
IEEE Trans. Ind. Electron., 2015

A Fixed-Frequency Quasi-${\rm V}^{2}$ Hysteretic Buck Converter With PLL-Based Two-Stage Adaptive Window Control.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
Design and implementation of a digitally controlled single-inductor dual-output (SIDO) buck converter.
Int. J. Circuit Theory Appl., 2014

A fast transient and under/overshoot suppression DC-DC Buck converter with ACP control.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

2013
A Digitally Controlled Switching Regulator With Reduced Conductive EMI Spectra.
IEEE Trans. Ind. Electron., 2013

Sensorless dead-time exploration for digitally controlled switching converters.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

A high effieciency DC/DC boost regulator with adaptive off/on-time control.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

AOT-controlled dual-mode AVP buck regulator with AEAF mechanism.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A Low-Dropout Regulator With Tail Current Control for DPWM Clock Correction.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

2011
Capacitor-less low-dropout regulator with slew-rate-enhanced circuit.
IET Circuits Devices Syst., 2011

A fast-transient quasi-V<sup>2</sup> switching buck regulator using AOT control.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
A new compact low-offset push-pull output buffer with current positive feedback for a 10-bit LCD source driver.
IET Circuits Devices Syst., 2010

2009
Area-efficient R-C DACs with Low-offset Push-pull Output Buffers for a 10-bit LCD Source Driver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Design and Implementation of Sigma-delta DPWM Controller for Switching Converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A Versatile Step-Up/Step-Down Switched-Capacitor-Based DC-DC Converter.
IEICE Trans. Electron., 2008

A top-down, mixed-level design methodology for CT BP ΔΣ modulator using verilog-A.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008


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