Chien-Chang Lin

Orcid: 0000-0001-6801-8061

According to our database1, Chien-Chang Lin authored at least 19 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
DNA of learning behaviors: A novel approach of learning performance prediction by NLP.
Comput. Educ. Artif. Intell., 2024

2023
Artificial intelligence in intelligent tutoring systems toward sustainable education: a systematic review.
Smart Learn. Environ., December, 2023

2007
Segmentation of specific speech signals from multi-dialog environment using SVM and wavelet.
Pattern Recognit. Lett., 2007

A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications.
IEEE J. Solid State Circuits, 2007

A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Very Low Bit Rate Video Coding Using H.264 Codec and Cubic Spline Interpolation.
Proceedings of the 3rd International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007), 2007

2006
DCT-Based Image Codec Embedded Cubic Spline Interpolation with Optimal Quantization.
Proceedings of the Eigth IEEE International Symposium on Multimedia (ISM 2006), 2006

Feature Comparison among Various Wavelets in Speaker Recognition Using Support Vector Machine.
Proceedings of the Eigth IEEE International Symposium on Multimedia (ISM 2006), 2006

A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

A Condition-based Intra Prediction Algorithm for H.264/AVC.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

Low Complexity Architecture Design of H.264 Predictive Pixel Compensator for HDTV Application.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005
Audio Classification and Categorization Based on Wavelets and Support Vector Machine.
IEEE Trans. Speech Audio Process., 2005

A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A power-aware IP core generator for the one-dimensional discrete Fourier transform.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A high-performance MPEG4 bitstream processing core.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

2003
A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths.
J. Circuits Syst. Comput., 2002

A new hardware efficient design for the one dimensional discrete Fourier transform.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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