Chie-In Lee

According to our database, Chie-In Lee authored at least 6 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Deep Neural Network Using Transfer Learning Technique for MOSFETs With Different Gate Lengths in Avalanche Region.

Chie-In Lee, Shi-Yan Zhang, Shih-Chieh Li, Jia-Han Yang, Jian Cheng Su

IEEE Access, 2024

2016

Analysis of temperature dependence of linearity for SiGe HBTs in the avalanche region using Volterra series.

Chie-In Lee, Yan-Ting Lin, Wei-Cheng Lin

Microelectron. Reliab., 2016

2015

Investigation of geometry dependence on MOSFET linearity in the impact ionization region using Volterra series.

Chie-In Lee, Wei-Cheng Lin, Yan-Ting Lin

Microelectron. Reliab., 2015

MOSFET channel resistance characterization from the triode region to impact ionization region with the inductive breakdown network.

Chie-In Lee, Wei-Cheng Lin

Microelectron. Reliab., 2015

2014

A 2.4 GHz high output power and high efficiency power amplifier operating at inductive breakdown in CMOS technology.

Chie-In Lee, Wei-Cheng Lin, Yan-Ting Lin

Microelectron. J., 2014

2013

A novel low-power transceiver topology for noncontact vital sign detection including the power management technique.

Chie-In Lee, Yan-Ting Lin, Yu-Her Chen, Wei-Cheng Lin

Microelectron. J., 2013