Chichyang Chen
According to our database1,
Chichyang Chen
authored at least 24 papers
between 1991 and 2015.
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Bibliography
2015
High-order Taylor series approximation for efficient computation of elementary functions.
IET Comput. Digit. Tech., 2015
2009
IET Comput. Digit. Tech., 2009
Pipelined Computation of Very Large Word-Length LNS Addition/Subtraction Computation with Exponential Convergence Rate.
Proceedings of the 10th International Symposium on Pervasive Systems, 2009
2007
Performance-Improved Computation of Very Large Word-Length LNS Addition/Substraction Using Signed-Digit Arithmetic.
J. Inf. Sci. Eng., 2007
Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
2006
Error Analysis of Large Word-Length LNS Addition/Subtraction Computation.
Proceedings of the International MultiConference of Engineers and Computer Scientists 2006, 2006
2004
An efficient VLSI design for a residue to binary converter for general balance moduli (2<sup>n</sup>-3, 2<sup>n</sup>+1, 2<sup>n</sup>-1, 2<sup>n</sup>+3).
IEEE Trans. Circuits Syst. II Express Briefs, 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
2003
J. Electron. Test., 2003
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
Performance-Improved Computation of Very Large Word-Length LNS Addition/Subtraction Using Signed-Digit Arithmetic.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
2001
Pattern Recognit. Lett., 2001
Content-Based Hybrid DPCM/Classified Vector Quantization for Coding Video Telephony Sequences.
J. Vis. Commun. Image Represent., 2001
Architectural Design of a Fast Floating-Point Multiplication-Add Fused Unit Using Signed-Digit Addition.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001
2000
Pipelined Computation of Very Large Word-Length LNS Addition/Subtraction with Polynomial Hardware Cost.
IEEE Trans. Computers, 2000
1999
A simple edge-preserving filtering technique for constructing multi-resolution systems of images.
Pattern Recognit. Lett., 1999
1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
1995
IEEE Trans. Ind. Electron., 1995
J. Intell. Robotic Syst., 1995
1994
Comput. Aided Geom. Des., 1994
1993
A New Robotic Hand/Eye Calibration Method by Active Viewing of a Checkerboard Pattern.
Proceedings of the 1993 IEEE International Conference on Robotics and Automation, 1993
1992
Deformation identification and estimation of one-dimensional objects by vision sensors.
J. Field Robotics, 1992
1991
Proceedings of the 1991 IEEE International Conference on Robotics and Automation, 1991
Deformation identification and estimation of one-dimensional objects by using vision sensors.
Proceedings of the 1991 IEEE International Conference on Robotics and Automation, 1991