Chiang-Hsiang Liao
According to our database1,
Chiang-Hsiang Liao
authored at least 2 papers
between 2014 and 2016.
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Bibliography
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
2014
A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014