Chia-Yi Chang

According to our database, Chia-Yi Chang authored at least 3 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Buffer/flip-flop block planning for power-integrity-driven floorplanning.

Hsin-Hua Pan, Hung-Ming Chen, Chia-Yi Chang

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008

Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization.

Chia-Yi Chang, Hung-Ming Chen

IEEE Trans. Very Large Scale Integr. Syst., 2008

2006

Web Server Power Estimation, Modeling and Management.

Chia-Hung Lien, Ying-Wen Bai, Ming-Bo Lin, Chia-Yi Chang, Ming-Yuan Tsai

Proceedings of the 14th IEEE International Conference on Networks, 2006