Chia-Pin R. Liu
According to our database1,
Chia-Pin R. Liu
authored at least 7 papers
between 1999 and 2009.
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Bibliography
2009
A Novel Floorplanning for Hierarchical VLSI Design.
Proceedings of the ISCA 24th International Conference on Computers and Their Applications, 2009
Floorplan Optimization for Hierarchical VLSI Design.
Proceedings of the ISCA 22nd International Conference on Computer Applications in Industry and Engineering, 2009
2008
A Novel Synthesis for Dynamic CMOS Circuits.
Proceedings of the ISCA 21st International Conference on Computer Applications in Industry and Engineering, 2008
2007
Gate Model Extraction from CMOS Transistor Circuits.
Proceedings of the ISCA 20th International Conference on Computer Applications in Industry and Engineering, 2007
2006
Traffic Monitoring for a Network Visualization Environment.
Proceedings of the 21st International Conference on Computers and Their Applications, 2006
Transistor-mapped binary decision diagram for CMOS circuits.
Proceedings of the ISCA 19th International Conference on Computer Applications in Industry and Engineering, 2006
1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999