Chia-Hsin Lee

According to our database, Chia-Hsin Lee authored at least 13 papers between 2004 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Electroencephalography Connectivity Assesses Cognitive Disorders of Autistic Children During Game-Based Social Interaction.

Yi-Li Tseng, Hong-Hsiang Liu, Yen-Nan Chiu, Chia-Hsin Lee, Wen-Che Tsai, Yang-Min Lin, Yi-Ling Chien

IEEE Trans. Cogn. Dev. Syst., April, 2024

2016

A New Methodology for Noise Sensor Placement Based on Association Rule Mining.

Yu-Hsiang Hung, Sheng-Hsin Fang, Hung-Ming Chen, Shen-Min Chen, Chang-Tzu Lin, Chia-Hsin Lee

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015

A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs.

Pei-Wen Luo, Chi-Kang Chen, Yu-Hui Sung, Wei Wu, Hsiu-Chuan Shih, Chia-Hsin Lee, Kuo-Hua Lee, Ming-Wei Li, Mei-Chiang Lung, Chun-Nan Lu, Yung-Fa Chou, Po-Lin Shih, Chung-Hu Ke, Chun Shiah, Patrick Stolt, Shigeki Tomishima, Ding-Ming Kwai, Bor-Doou Rong, Nicky Lu, Shih-Lien Lu, Cheng-Wen Wu

Proceedings of the Symposium on VLSI Circuits, 2015

2014

A power delivery network (PDN) engineering change order (ECO) approach for repairing IR-drop failures after the routing stage.

Tsu-Wei Tseng, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

Improving power delivery network design by practical methodologies.

Chia-Chi Huang, Chang-Tzu Lin, Wei-Syun Liao, Chieh-Jui Lee, Hung-Ming Chen, Chia-Hsin Lee, Ding-Ming Kwai

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013

Enabling inter-die co-optimization in 3-D IC with TSVs.

Chang-Tzu Lin, Tsu-Wei Tseng, Yung-Fa Chou, Chia-Hsin Lee, Ding-Ming Kwai

Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

Effective power network prototyping via statistical-based clustering and sequential linear programming.

Shih-Ying Sean Liu, Chieh-Jui Lee, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee

Proceedings of the Design, Automation and Test in Europe, 2013

I-LUTSim: An iterative look-up table based thermal simulator for 3-D ICs.

Chi-Wen Pan, Yu-Min Lee, Pei-Yu Huang, Chi-Ping Yang, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

3-D centric technology and realization with TSV.

Chang-Tzu Lin, Chia-Hsin Lee, Tsu-Wei Tseng, Ding-Ming Kwai, Yung-Fa Chou

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

Hierarchical power network synthesis for multiple power domain designs.

Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2006

SRAM Cell Current in Low Leakage Design.

Ding-Ming Kwai, Ching-Hua Hsiao, Chung-Ping Kuo, Chi-Hsien Chuang, Min-Chung Hsu, Yi-Chun Chen, Yu-Ling Sung, Hsien-Yu Pan, Chia-Hsin Lee, Meng-Fan Chang, Yung-Fa Chou

Proceedings of the 14th IEEE International Workshop on Memory Technology, 2006

FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment.

Ding-Ming Kwai, Yung-Fa Chou, Meng-Fan Chang, Su-Meng Yang, Ding-Sheng Chen, Min-Chung Hsu, Yu-Zhen Liao, Shiao-Yi Lin, Yu-Ling Sung, Chia-Hsin Lee, Hsin-Kun Hsu

Proceedings of the 14th IEEE International Workshop on Memory Technology, 2006

2004

Lot streaming models with a limited number of capacitated transporters in multistage batch production systems.

Huan Neng Chiu, Jen-Huei Chang, Chia-Hsin Lee

Comput. Oper. Res., 2004