Chia-En Huang
According to our database1,
Chia-En Huang
authored at least 4 papers
between 2011 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2021
A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2014
Control of a pneumatic power active lower-limb orthosis with filter-based iterative learning control.
Int. J. Syst. Sci., 2014
2012
A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC<sup>2</sup>RA) circuitry achieving 3x reduction on speed variation for single ended arrays.
Proceedings of the Symposium on VLSI Circuits, 2012
2011
An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011