Chia-Chun Wang
Orcid: 0000-0003-1067-4749
According to our database1,
Chia-Chun Wang
authored at least 9 papers
between 2016 and 2024.
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Collaborative distances:
Timeline
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Bibliography
2024
ISSA: Architecting CNN Accelerators Using Input-Skippable, Set-Associative Computing-in-Memory.
IEEE Trans. Computers, September, 2024
Comparative analysis of machine learning algorithms for Alzheimer's disease classification using EEG signals and genetic information.
Comput. Biol. Medicine, 2024
2023
Exploiting and Enhancing Computation Latency Variability for High-Performance Time-Domain Computing-in-Memory Neural Network Accelerators.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
BICEP: Exploiting Bitline Inversion for Efficient Operation-Unit-Based Compute-in-Memory Architecture: No Retraining Needed!
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
Built-in Self-Test and Built-in Self-Repair Strategies Without Golden Signature for Computing in Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
ISSA: Input-Skippable, Set-Associative Computing-in-Memory (SA-CIM) Architecture for Neural Network Accelerators.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
2016
Proceedings of the IEEE Topical Conference on Wireless Sensors and Sensor Networks, 2016