Chia-Chun Lin

According to our database, Chia-Chun Lin authored at least 46 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Wearable Assistant Device for the Hearing Impaired to Recognize Emergency Vehicle Sirens with Edge Computing.

Chiun-Li Chin, Chia-Chun Lin, Jing-Wen Wang, Wei-Cheng Chin, Yu-Hsiang Chen, Sheng-Wen Chang, Pei-Chen Huang, Xin Zhu, Yu-Lun Hsu, Shing-Hong Liu

Sensors, September, 2023

2022

LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach.

Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization.

Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Majority Logic Circuit Minimization Using Node Addition and Removal.

Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model.

Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang

ACM J. Emerg. Technol. Comput. Syst., 2021

An IMU-aided Fitness System.

Yi-Ting Lin, Chun-Jui Chen, Pei-Yi Kuo, Si-Huei Lee, Chia-Chun Lin, Yun-Ju Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

Cluster Tool Performance Analysis using Graph Database.

Shiuan-Hau Huang, Hsin-Ping Yen, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

On Reduction of Computations for Threshold Function Identification.

Wen-Chih Hsu, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays.

Hsin-Tsung Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

An Efficient Approximate Node Merging with an Error Rate Guarantee.

Kit Seng Tam, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

A General Equivalence Checking Framework for Multivalued Logic.

Chia-Chun Lin, Hsin-Ping Yen, Sheng-Hsiu Wei, Pei-Pei Chen, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

A New Necessary Condition for Threshold Function Identification.

Chia-Chun Lin, Chin-Heng Liu, Yung-Chih Chen, Chun-Yao Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

LOOPLock: Logic Optimization-Based Cyclic Logic Locking.

Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Dynamic Expansion Order Algorithm for the SAT-based Minimization.

Chia-Chun Lin, Kit Seng Tam, Chana-Cheng Ko, Hsin-Ping Yen, Shenz-Hsiu Wei, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement.

Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Rehabilitation System for Limbs using IMUs.

Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin, Yung-Chih Chen, Yun-Ju Lee, Chun-Yao Wang

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

A Convolutional Result Sharing Approach for Binarized Neural Network Inference.

Ya-Chun Chang, Chia-Chun Lin, Yi-Ting Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.

Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Using Online User-Generated Reviews to Predict Offline Box-Office Sales and Online DVD Store Sales in the O2O Era.

Chieh Lee, Xun Xu, Chia-Chun Lin

J. Theor. Appl. Electron. Commer. Res., 2019

A Glitch Key-Gate for Logic Locking.

De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

A Smart Single-Sensor Device for Instantaneously Monitoring Lower Limb Exercises.

Yan-Ping Chang, Teng-Chia Wang, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

2018

On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses.

Hsin-Pei Wang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang

IEEE Trans. Very Large Scale Integr. Syst., 2018

Using range-equivalent circuits for facilitating bounded sequential equivalence checking.

Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang

Proceedings of the 2018 International Symposium on VLSI Design, 2018

Logic optimization with considering boolean relations.

Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.

Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

An Efficient Indexing Method for Skyline Computations with Partially Ordered Domains.

Yu-Ling Hsueh, Chia-Chun Lin, Chia-Che Chang

IEEE Trans. Knowl. Data Eng., 2017

An efficient approach to finding potential products continuously.

Yu-Ling Hsueh, He Ma, Chia-Chun Lin, Roger Zimmermann

Inf. Syst., 2017

In&Out: Restructuring for threshold logic network optimization.

Chia-Chun Lin, Chiao-Wei Huang, Chun-Yao Wang, Yung-Chih Chen

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016

Traffic Anomalous Region Detection Model.

Yu-Ling Hsueh, Wei-Li Lai, Chia-Chun Lin, Pierre Pascal Lindenberg

Proceedings of the 5th IIAI International Congress on Advanced Applied Informatics, 2016

2015

PAQCS: Physical Design-Aware Fault-Tolerant Quantum Circuit Synthesis.

Chia-Chun Lin, Susmita Sur-Kolay, Niraj K. Jha

IEEE Trans. Very Large Scale Integr. Syst., 2015

An adaptive reversible steganographic scheme based on the just noticeable distortion.

Chuan Qin, Chin-Chen Chang, Chia-Chun Lin

Multim. Tools Appl., 2015

2014

FTQLS: Fault-Tolerant Quantum Logic Synthesis.

Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha

IEEE Trans. Very Large Scale Integr. Syst., 2014

RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits.

Chia-Chun Lin, Niraj K. Jha

ACM J. Emerg. Technol. Comput. Syst., 2014

QLib: Quantum module library.

Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha

ACM J. Emerg. Technol. Comput. Syst., 2014

Rewiring for threshold logic circuit minimization.

Chia-Chun Lin, Chun-Yao Wang, Yung-Chih Chen, Ching-Yi Huang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Optimized Quantum Gate Library for Various Physical Machine Descriptions.

Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

A novel multi-group exploiting modification direction method based on switch map.

Xing-Tian Wang, Chin-Chen Chang, Chia-Chun Lin, Mingchu Li

Signal Process., 2012

Transformation for adults in an Internet-based learning environment - is it necessary to be self-directed?

Regina Juchun Chu, Anita Zichun Chu, Cathy Weng, Chin-Chung Tsai, Chia-Chun Lin

Br. J. Educ. Technol., 2012

Design of Quantum Circuits for Random Walk Algorithms.

Amlan Chakrabarti, Chia-Chun Lin, Niraj K. Jha

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Strong Tamper-Localization, Visual Secret Sharing Scheme Based on Exploiting Modification Direction.

Chin-Chen Chang, Ngoc-Tu Huynh, Chia-Chun Lin

Proceedings of the Seventh Asia Joint Conference on Information Security, 2012

2011

A mutual information based approach for evaluating the quality of clustering.

Shaikh Anowarul Fattah, Chia-Chun Lin, Sun-Yuan Kung

Proceedings of the IEEE International Conference on Acoustics, 2011

2008

A Hardware-Efficient H.264/AVC Motion-Estimation Design for High-Definition Video.

Yu-Kun Lin, Chia-Chun Lin, Tzu-Yun Kuo, Tian-Sheuan Chang

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A 242mW, 10mm²1080p H.264/AVC high profile encoder chip.

Yu-Kun Lin, De-Wei Li, Chia-Chun Lin, Tzu-Yun Kuo, Sian-Jin Wu, Wei-Cheng Tai, Wei-Cheng Chang, Tian-Sheuan Chang

Proceedings of the 45th Design Automation Conference, 2008

2007

PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding.

Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang

Proceedings of the IEEE International Conference on Acoustics, 2007

2006

A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding.

Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004

Window Adaptive TCP for EGPRS Networks.

Duan-Shin Lee, Chia-Chun Lin

J. Inf. Sci. Eng., 2004