Chia-Cheng Pai

According to our database, Chia-Cheng Pai authored at least 4 papers between 2018 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits.

Tsai-Chieh Chen, Chia-Cheng Pai, Yi-Zhan Hsieh, Hsiao-Yin Tseng, Chien-Mo James Li, Tsung-Te Liu, I-Wei Chiu

J. Electron. Test., 2021

2019

DR-Scan: Dual-Rail Asynchronous Scan DfT and ATPG.

Shih-An Hsieh, Ying-Hsu Wang, Ting-Yu Shen, Kuan-Yen Huang, Chia-Cheng Pai, Tsai-Chieh Chen, James Chien-Mo Li

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018

Test methodology for PCHB/PCFB Asynchronous Circuits.

Ting-Yu Shen, Chia-Cheng Pai, Tsai-Chieh Chen, James Chien-Mo Li, Samuel Pan

Proceedings of the IEEE International Test Conference, 2018

Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree construction.

Run-Yi Wang, Chia-Cheng Pai, Jun-Jie Wang, Hsiang-Ting Wen, Yu-Cheng Pai, Yao-Wen Chang, James Chien-Mo Li, Jie-Hong Roland Jiang

Proceedings of the 55th Annual Design Automation Conference, 2018