Chia-Cheng Chen
According to our database1,
Chia-Cheng Chen
authored at least 8 papers
between 2006 and 2021.
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Bibliography
2021
Adaptive parametric yield enhancement via collinear multivariate analytics for semiconductor intelligent manufacturing.
Appl. Soft Comput., 2021
2017
Modeling collinear WATs for parametric yield enhancement in semiconductor manufacturing.
Proceedings of the 13th IEEE Conference on Automation Science and Engineering, 2017
2014
A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
Assessing agreement with intraclass correlation coefficient and concordance correlation coefficient for data with repeated measures.
Comput. Stat. Data Anal., 2013
A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
A 55nm 0.55v 6T SRAM with variation-tolerant dual-tracking word-line under-drive and data-aware write-assist.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
2008
Comparison of ICC and CCC for assessing agreement for data without and with replications.
Comput. Stat. Data Anal., 2008
2006
An AND-type match-line scheme for high-performance energy-efficient content addressable memories.
IEEE J. Solid State Circuits, 2006