Chi-Yang Chang

According to our database, Chi-Yang Chang authored at least 6 papers between 2007 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

IL analysis for 8-way power combining network in 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA design.

Ching-Ying Huang, Pin-Hsuan Wu, Kun-Long Wu, Robert Hu, Chi-Yang Chang

IET Circuits Devices Syst., 2019

Analysis of wide-IF-band 65 nm-CMOS mixer for 77-110 GHz radio-astronomical receiver design.

Ching-Ying Huang, Kun-Long Wu, Robert Hu, Chi-Yang Chang

IET Circuits Devices Syst., 2019

Analysis and design of wideband active power splitter with interleaf transmission line topology.

Ching-Ying Huang, Robert Hu, Dow-Chi Niu, Chi-Yang Chang

IET Circuits Devices Syst., 2019

2018

Low supply voltage and multiphase all-digital crystal-less clock generator.

Yo-Hao Tu, Jen-Chieh Liu, Kuo-Hsing Cheng, Chi-Yang Chang

IET Circuits Devices Syst., 2018

2011

A 0.06-psRMS SSC-induced jitter, ΔΣ-dithering-free, 6-GHz spread-spectrum clock generator for serial-ATA generation.

Cheng-Liang Hung, Kuo-Hsing Cheng, Yu-Chen Lin, Bo-Qian Jiang, Che-hao Fan, Chi-Yang Chang

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2007

Printed Circuit Board Bandpass Filters with Octave Bandwidth and Very Wide Upper Stopband.

Hui-Chun Chen, Chi-Yang Chang

IEICE Trans. Electron., 2007