Chi-Wook Kim
According to our database1,
Chi-Wook Kim
authored at least 4 papers
between 2013 and 2016.
Collaborative distances:
Collaborative distances:
Timeline
2013
2014
2015
2016
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2016
18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
17.7 A digital DLL with hybrid DCC using 2-step duty error extraction and 180° phase aligner for 2.67Gb/S/pin 16Gb 4-H stack DDR4 SDRAM with TSVs.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
Proceedings of the Symposium on VLSI Circuits, 2014
2013
A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme.
IEEE J. Solid State Circuits, 2013