Chi-Tse Huang

According to our database, Chi-Tse Huang authored at least 12 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

BFP-CIM: Runtime Energy-Accuracy Scalable Computing-in-Memory-Based DNN Accelerator Using Dynamic Block-Floating-Point Arithmetic.

Cheng-Yang Chang, Chi-Tse Huang, Yu-Chuan Chuang, Kuang-Chao Chou, An-Yeu Wu

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024

Efficient and Reliable Vector Similarity Search Using Asymmetric Encoding with NAND-Flash for Many-Class Few-Shot Learning.

Hao-Wei Chiang, Chi-Tse Huang, Hsiang-Yun Cheng, Po-Hao Tseng, Ming-Hsiu Lee, An-Yeu Wu

CoRR, 2024

A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection.

Yu-Chuan Chuang, Ming-Guang Lin, Chi-Tse Huang, Chieh-Fang Teng, Cheng-Yang Chang, Yi-Ta Chen, An-Yeu Andy Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

BORE: Energy-Efficient Banded Vector Similarity Search with Optimized Range Encoding for Memory-Augmented Neural Network.

Chi-Tse Huang, Cheng-Yang Chang, Hsiang-Yun Cheng, An-Yeu Wu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator.

Cheng-Yang Chang, Chi-Tse Huang, Yu-Chuan Chuang, Kuang-Chao Chou, An-Yeu Andy Wu

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence.

Cheng-Yang Chang, Yu-Chuan Chuang, Chi-Tse Huang, An-Yeu Wu

IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

DEA-NIMC: Dynamic Energy-Aware Policy for Near/In-Memory Computing Hybrid Architecture.

Yu-Cheng Wu, Chi-Tse Huang, An-Yeu Andy Wu

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing.

Chi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Mitigating Non-ideality Issues of Analog Computing-In-Memory in DNN-based designs.

Chi-Tse Huang, An-Yeu Andy Wu

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022

D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros.

Ming-Guang Lin, Chi-Tse Huang, Yu-Chuan Chuang, Yi-Ta Chen, Ying-Tuan Hsu, Yu-Kai Chen, Jyun-Jhe Chou, Tsung-Te Liu, Chi-Sheng Shih, An-Yeu Wu

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory.

Chi-Tse Huang, Yu-Chuan Chuang, Ming-Guang Lin, An-Yeu Andy Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

PQ-HDC: Projection-Based Quantization Scheme for Flexible and Efficient Hyperdimensional Computing.

Chi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu

Proceedings of the Artificial Intelligence Applications and Innovations, 2021