Chi-Sheng Lin

According to our database, Chi-Sheng Lin authored at least 21 papers between 2002 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Simultaneous and Anonymous Mobile Network Authentication Scheme Based on Chaotic Maps.

Wen-Chung Kuo, Chi-Sheng Lin, Chen-Tsun Chuang, Ming-Chih Kao

Inf. Technol. Control., 2016

2013

Performance evaluations of channel estimations in IEEE 802.11p environments.

Chi-Sheng Lin, Che-Kang Sun, Jia-Chin Lin, Bo-Chiuan Chen

Telecommun. Syst., 2013

Vibration Analysis of Composite Laminate Plate Excited by Piezoelectric Actuators.

Shiuh-Chuan Her, Chi-Sheng Lin

Sensors, 2013

Physical-layer transceiving techniques on data-aided orthogonal frequency-division multiplexing towards seamless service on vehicular communications.

Chi-Sheng Lin, Jia-Chin Lin

IET Commun., 2013

2012

Wireless communication performance based on IEEE 802.11p R2V field trials.

Jia-Chin Lin, Chi-Sheng Lin, Chih-Neng Liang, Bo-Chiuan Chen

IEEE Commun. Mag., 2012

2011

A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process.

Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications.

Tsung-Che Lu, Lan-Da Van, Chi-Sheng Lin, Chun-Ming Huang

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

Deflection of Cross-Ply Composite Laminates Induced by Piezoelectric Actuators.

Shiuh-Chuan Her, Chi-Sheng Lin

Sensors, 2010

Novel Channel Estimation Techniques in IEEE 802.11p Environments.

Chi-Sheng Lin, Jia-Chin Lin

Proceedings of the 71st IEEE Vehicular Technology Conference, 2010

An effective phase detector for phase-locked loops with wide capture range and fast acquisition time.

Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

High-speed and low-power programmable frequency divider.

Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Ying-Zong Juang, Chun-Ming Huang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Improved time-domain channel estimation techniques in IEEE 802.11p environments.

Chi-Sheng Lin, Jia-Chin Lin

Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010

2009

An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops.

Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang

IEEE J. Solid State Circuits, 2009

An edge-missing compensator for fast-settling wide-locking-range PLLs.

Ting-Hsu Chien, Chi-Sheng Lin, Ying-Zong Juang, Chun-Ming Huang, Chin-Long Wey

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2006

A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design.

Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, Bin-Da Liu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004

A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach.

Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

A new successive approximation architecture for low-power low-cost CMOS A/D converter.

Chi-Sheng Lin, Bin-Da Liu

IEEE J. Solid State Circuits, 2003

A low-power precomputation-based fully parallel content-addressable memory.

Chi-Sheng Lin, Jui-Chuan Chang, Bin-Da Liu

IEEE J. Solid State Circuits, 2003

Low-power and low-voltage fully parallel content-addressable memory.

Chi-Sheng Lin, Kuan-Hua Chen, Bin-Da Liu

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

A scalable sorting architecture based on maskable WTA/MAX circuit.

Shin-Hong Ou, Chi-Sheng Lin, Bin-Da Liu

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Design of a pipelined and expandable sorting architecture with simple control scheme.

Chi-Sheng Lin, Bin-Da Liu

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002