Chi-Hsien Wu

According to our database, Chi-Hsien Wu authored at least 1 paper in 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2017

Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology.

Chi-Hsien Wu, Jau-Ji Jou, Hsin-Wen Ting, Shao-I Chu, Bing-Hong Liu

Proceedings of the International SoC Design Conference, 2017