Chi-Cheng Ju
According to our database1,
Chi-Cheng Ju
authored at least 21 papers
between 2009 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
21.3 A 5.69mm<sup>2</sup> 0.98nJ/Pixel Image-Processing SoC with 24b High-Dynamic-Range and Multiple Sensor Format Support for Automotive Applications.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
A 0.7mm<sup>2</sup> 8.54mW FocusNet Display LSI for Power Reduction on OLED Smart-phones.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A 0.76MM<sup>2</sup> 0.22NJ/Pixel DL-Assisted 4K Video Encoder LSI for Quality-of-Experience Over Smart-Phones.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2017
Proceedings of the 2017 IEEE International Conference on Multimedia & Expo Workshops, 2017
Proceedings of the IEEE International Conference on Consumer Electronics, 2017
2016
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Conference on Multimedia & Expo Workshops, 2016
Proceedings of the IEEE International Conference on Consumer Electronics, 2016
A 2.6mm<sup>2</sup> 0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems.
Proceedings of the 2015 IEEE International Conference on Multimedia and Expo, 2015
2014
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the 2013 IEEE International Conference on Multimedia and Expo Workshops, 2014
A 0.2nJ/pixel 4K 60fps Main-10 HEVC decoder with multi-format capabilities for UHD-TV applications.
Proceedings of the ESSCIRC 2014, 2014
2013
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Area and Memory Efficient Architectures for 3D Blu-ray-compliant Multimedia Processors.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012
A novel parallel H.264 decoder using dynamic load balance on dual core embedded system.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009