Chi-Chang Lu
Orcid: 0000-0002-1575-883X
According to our database1,
Chi-Chang Lu
authored at least 23 papers
between 2002 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
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On csauthors.net:
Bibliography
2020
IEEE Access, 2020
IEEE Access, 2020
2019
IET Circuits Devices Syst., 2019
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019
2018
Proceedings of the Recent Advances in Intelligent Information Hiding and Multimedia Signal Processing, 2018
2015
A Study of the Accessible Approach to Replace the Reservoir Silt Glaze with New Formula.
Proceedings of the Cross-Cultural Design Methods, Practice and Impact, 2015
2014
Cultural Creativity in Design Strategy: A Case Study of User's Preference of a Bird-Shaped Teapot.
Proceedings of the Cross-Cultural Design, 2014
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Research on Symbol Expression for Eye Image in Product Design: The Usage of the Chinese Traditional "Yun Wen".
Proceedings of the Cross-Cultural Design. Methods, Practice, and Case Studies, 2013
2011
A 330 MHz 11 bit 26.4 mW CMOS Low-Hold-Pedestal Fully Differential Sample-and-Hold Circuit.
Circuits Syst. Signal Process., 2011
Proceedings of the Internationalization, Design and Global Development, 2011
Proceedings of the Internationalization, Design and Global Development, 2011
2010
Circuits Syst. Signal Process., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
A 250MHz 11BIT 20mW low-hold-pedestal CMOS fully differential track-and-hold circuit.
Proceedings of the 2007 IEEE International SOC Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2005
A 1.5-V 50-MHz pseudodifferential CMOS sample-and-hold circuit with low hold pedestal.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002