Chetan Prasad
According to our database1,
Chetan Prasad
authored at least 8 papers
between 2014 and 2023.
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Bibliography
2023
Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
Intel 4 CMOS Technology Featuring Advanced FinFET Transistors optimized for High Density and High-Performance Computing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2020
Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2018
2015
A 14 nm SoC platform technology featuring 2<sup>nd</sup> generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um<sup>2</sup> SRAM cells, optimized for low power, high performance and high density SoC products.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
2014
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014