Cheon An Lee

According to our database, Cheon An Lee authored at least 6 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface.

Moosung Kim, Sung-Won Yun, Jungjune Park, Hyun Kook Park, Jungyu Lee, Yeong Seon Kim, Dae-Hoon Na, Sara Choi, Youngsun Song, Jonghoon Lee, Hyun-Jun Yoon, Kangbin Lee, Byunghoon Jeong, Sanglok Kim, Junhong Park, Cheon An Lee, Jaeyun Lee, Ji-Sang Lee, Jin Young Chun, Joonsuc Jang, Younghwi Yang, Seung Hyun Moon, Myung-Hoon Choi, Wontae Kim, Jungsoo Kim, Seok-Min Yoon, Pansuk Kwak, Myunghun Lee, Raehyun Song, Sunghoon Kim, Chiweon Yoon, Dongku Kang, Jin-Yub Lee, Jai Hyuk Song

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

A 512Gb 3b/Cell 7^th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface.

Jiho Cho, D. Chris Kang, Jongyeol Park, Sangwan Nam, Jung-Ho Song, Bong-Kil Jung, Jaedoeg Lyu, Hogil Lee, Won-Tae Kim, Hongsoo Jeon, Sunghoon Kim, In-Mo Kim, Jae-Ick Son, Kyoungtae Kang, Sang-Won Shim, JongChul Park, Eungsuk Lee, Kyung-Min Kang, Sang-Won Park, Jaeyun Lee, Seung Hyun Moon, Pansuk Kwak, Byunghoon Jeong, Cheon An Lee, Kisung Kim, Junyoung Ko, Tae-Hong Kwon, Junha Lee, Yohan Lee, Chaehoon Kim, Myeong-Woo Lee, Jeong-Yun Yun, HoJun Lee, Yonghyuk Choi, Sanggi Hong, Jonghoon Park, Yoonsung Shin, Hojoon Kim, Hansol Kim, Chiweon Yoon, Dae-Seok Byeon, Seungjae Lee, Jin-Yub Lee, Jai Hyuk Song

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory.

Junyoung Ko, Younghwi Yang, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2019

2018

A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput.

Seungjae Lee, Chulbum Kim, Minsu Kim, Sung-Min Joe, Joonsuc Jang, Seungbum Kim, Kangbin Lee, Jisu Kim, Jiyoon Park, Hanjun Lee, Min-Seok Kim, Seonyong Lee, SeonGeon Lee, Jinbae Bang, Dongjin Shin, Hwajun Jang, Deokwoo Lee, Nahyun Kim, Jonghoo Jo, Jonghoon Park, Sohyun Park, Youngsik Rho, Yongha Park, Hojoon Kim, Cheon An Lee, Chungho Yu, Young-Sun Min, Moosung Kim, Kyungmin Kim, Seunghyun Moon, Hyun-Jin Kim, Youngdon Choi, YoungHwan Ryu, Jinwon Choi, Minyeong Lee, Jungkwan Kim, Gyo Soo Choo, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Ki-Tae Park, Kyehyun Kyung

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers.

Dongku Kang, Woopyo Jeong, Chulbum Kim, Doo-Hyun Kim, Yong-Sung Cho, Kyung-Tae Kang, Jinho Ryu, Kyung-Min Kang, Sungyeon Lee, Wandong Kim, Hanjun Lee, Jaedoeg Yu, Nayoung Choi, Dong-Su Jang, Cheon An Lee, Young-Sun Min, Moosung Kim, Ansoo Park, Jae-Ick Son, In-Mo Kim, Pansuk Kwak, Bong-Kil Jung, Doosub Lee, Hyunggon Kim, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yup Lee, Ki-Tae Park, Kyehyun Kyung

IEEE J. Solid State Circuits, 2017

2016

WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory.

Junyoung Ko, Younghwi Yang, Seong-Ook Jung, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016