Cheoljon Jang
According to our database1,
Cheoljon Jang
authored at least 4 papers
between 2011 and 2014.
Collaborative distances:
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Bibliography
2014
Power-aware floorplanning-based power throughsilicon- via technology and bump minimisation for three-dimensional power delivery network.
IET Comput. Digit. Tech., 2014
2013
Power bumps and through-silicon-vias placement with optimised power mesh structure for power delivery network in three-dimensional-integrated circuits.
IET Comput. Digit. Tech., 2013
2012
Proceedings of the 26th International Conference on Advanced Information Networking and Applications Workshops, 2012
2011
Design of one chip communication stack processor and MMS communication stack library based on IEC 61850.
Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011