Chenglong Xiao

Orcid: 0000-0001-7013-4985

According to our database1, Chenglong Xiao authored at least 19 papers between 2011 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2025
Decomposition based estimation of distribution algorithm for high-level synthesis design space exploration.
Integr., 2025

2024
Reinforcement Learning for Selecting Custom Instructions Under Area Constraint.
IEEE Trans. Artif. Intell., April, 2024

Algorithms with improved delay for enumerating connected induced subgraphs of a large cardinality.
Inf. Process. Lett., January, 2024

An algorithm with a delay of O(kΔ) for enumerating connected induced subgraphs of size <i>k</i>.
CoRR, 2024

Fine-Grained Features Alignment and Fusion for Text-Video Cross-Modal Retrieval.
Proceedings of the IEEE International Conference on Acoustics, 2024

2021
An Optimal Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

An algorithm with improved delay for enumerating connected induced subgraphs of a large cardinality.
CoRR, 2021

Algorithms for enumerating connected induced subgraphs of a given order.
CoRR, 2021

2019
Parallel Enumeration of Custom Instructions Based on Multidepth Graph Partitioning.
IEEE Embed. Syst. Lett., 2019

2017
Parallel custom instruction identification for extensible processors.
J. Syst. Archit., 2017

A Faster Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs.
IEEE Embed. Syst. Lett., 2017

2016
A comparison of heuristic algorithms for custom instruction selection.
Microprocess. Microsystems, 2016

2015
Selecting most profitable instruction-set extensions using ant colony heuristic.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014
Automatic custom instruction identification for application-specific instruction set processors.
Microprocess. Microsystems, 2014

Improving high-level synthesis effectiveness through custom operator identification.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2012
Exact custom instruction enumeration for extensible processors.
Integr., 2012

2011
An efficient algorithm for custom instruction enumeration.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Efficient maximal convex custom instruction enumeration for extensible processors.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Efficient custom instruction enumeration for extensible processors.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011


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