Chenglong Liang

According to our database, Chenglong Liang authored at least 5 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Design of CMOS Integrated Circulator Based on Sequentially Switched Delay Lines With Body-Floating and Clock Boosting Techniques.

Bingjun Tang, Yuanrui Li, Chenglong Liang, Zhongming Xue, Zhuoqi Guo, Li Geng

IEEE Trans. Circuits Syst. II Express Briefs, October, 2024

A 12.9-to-24 GHz Dual-Mode Multi-Coil VCO Achieving 199.2 dBc/Hz Peak FoM_T in 65-nm CMOS.

Ya Zhao, Chao Fan, Yuanxing Peng, Chenglong Liang, Jun Yin, Pui-In Mak, Li Geng

IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

2022

A Cap-Less High PSR and Low Output Noise Low-Dropout Regulator for Cryogenic Applications.

Lingyun Liu, Chenglong Liang, Zhuoqi Guo, Zhongming Xue, Li Geng

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

2021

A 0.025% DC Current Mismatch Charge Pump for PLL Applications.

Shengyu Liang, Youze Xin, Chenglong Liang, Bin Zhang, Yanlong Zhang, Xiaoli Wang, Li Geng

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A 47K Noise Temperature CMOS S-band LNA for Cryogenic Applications.

Yi Xie, Chenglong Liang, Bingjun Tang, Lingyun Liu, Li Geng

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021