Chenggong Wan

According to our database, Chenggong Wan authored at least 7 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

High-Precision GRO-Based ROIC Adopting Sliding Scale Average Method for SPAD Array.

Lixia Zheng, Yanna Zheng, Chenggong Wan, Xuyan Li, Weifeng Sun, Jin Wu

IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

A Low-Power Capacitorless LDO Regulator with Transient Enhancement Structure.

Lixia Zheng, Yi Zhu, Huiyong Xian, Jinwen Li, Chenggong Wan, Jin Wu, Weifeng Sun

J. Circuits Syst. Comput., February, 2024

2023

A low jitter fractional PLL with offset current charge pump.

Jin Wu, Minwei Hu, Xudong Wu, Yang Zuo, Chenggong Wan, Lixia Zheng, Weifeng Sun

Microelectron. J., 2023

A SPAD Relative Address Coding for Lateral Resolution Improvement in Coincidence Detection.

Chenggong Wan, Lixia Zheng, Jin Wu

Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Region of Interest Technique for Event Driven Typed SPAD Readout Circuit.

Minwei Hu, Jin Wu, Chenggong Wan, Lixia Zheng

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022

High-Precision Time Interval Measurement Method Based on Sliding Scaled Time-to-Digital Conversion Circuit.

Jin Wu, Ruiming Zhong, Yuanfeng Sui, Yang Zhao, Chenggong Wan, Lixia Zheng

IEEE Trans. Instrum. Meas., 2022

A 0.8-3.2 GHz PLL with wide frequency division ratio range.

Jin Wu, Jinwen Li, Xudong Wu, Chenggong Wan, Lixia Zheng, Weifeng Sun

Microelectron. J., 2022