Chengbo Xue
Orcid: 0000-0002-4786-2586
According to our database1,
Chengbo Xue
authored at least 10 papers
between 2017 and 2024.
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Bibliography
2024
A Hardware Acceleration of Maximum Likelihood Estimation Algorithm With Alternating Projection on FPGA.
IEEE Trans. Very Large Scale Integr. Syst., June, 2024
2022
Deep Learning-Aided Signal Detection for Two-Stage Index Modulated Universal Filtered Multi-Carrier Systems.
IEEE Trans. Cogn. Commun. Netw., 2022
Hardware Acceleration of MUSIC Algorithm for Sparse Arrays and Uniform Linear Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
2021
DOA estimation based on sum-difference coarray with virtual array interpolation concept.
EURASIP J. Adv. Signal Process., 2021
2020
SimuNN: A Pre-RTL Inference, Simulation and Evaluation Framework for Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
A Reconfigurable Pipelined Architecture for Convolutional Neural Network Acceleration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A Fast Modular Inversion FPGA Implementation over GF(2<sup>m</sup>) using Modified x<sup>2n</sup> Unit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A two-stage variation-aware task mapping scheme for fault-tolerant multi-core Network-on-Chips.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Modeling and analyzing of underwater acoustic channels with curvilinear boundaries in shallow ocean.
Proceedings of the 2017 IEEE International Conference on Signal Processing, 2017