Cheng Zhuo

Weikang Qian

Integr., 2020

FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric.

[BibT_eX]

[DOI]

CoRR, 2020

Early-Stage Planning of Switched-Capacitor Converters in a Heterogeneous Chip.

[BibT_eX]

[DOI]

IEEE Access, 2020

Analog Content Addressable Memory using Ferroelectric: A Case Study of Search-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

An Efficient and Flexible Learning Framework for Dynamic Power and Thermal Co-Management.

[BibT_eX]

[DOI]

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

MS-NAS: Multi-scale Neural Architecture Search for Medical Image Segmentation.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020

DeU-Net: Deformable U-Net for 3D Cardiac MRI Video Segmentation.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020

A Convolutional Neural Network Accelerator Architecture with Fine-Granular Mixed Precision Configurability.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Cross-denoising Network against Corrupted Labels in Medical Image Segmentation with Domain Shift.

[BibT_eX]

[DOI]

Proceedings of the Twenty-Ninth International Joint Conference on Artificial Intelligence, 2020

Countering Variations and Thermal Effects for Accurate Optical Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Optimally Approximated and Unbiased Floating-Point Multiplier with Runtime Configurability.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Modeling and Benchmarking Computing-in-Memory for Design Space Exploration.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Private Knowledge Transfer via Model Distillation with Generative Adversarial Networks.

[BibT_eX]

[DOI]

Di Gao

Proceedings of the ECAI 2020 - 24th European Conference on Artificial Intelligence, 29 August-8 September 2020, Santiago de Compostela, Spain, August 29 - September 8, 2020, 2020

When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Nonvolatile and Energy-Efficient FeFET-Based Multiplier for Energy-Harvesting Devices.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

A Reconfigurable Approximate Multiplier for Quantized CNN Applications.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Spatio-Temporal Deformable Convolution for Compressed Video Quality Enhancement.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020

2019

Single-Inductor-Multiple-Tier Regulation: TSV-Inductor-Based On-Chip Buck Converters for 3-D IC Power Delivery.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

A Cross-Layer Framework for Temporal Power and Supply Noise Prediction.

[BibT_eX]

[DOI]

Yaguang Li

Pingqiang Zhou

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

System-level design consideration and optimization of through-silicon-via inductor.

[BibT_eX]

[DOI]

Baixin Chen

Integr., 2019

Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips.

[BibT_eX]

[DOI]

Leilei Wang

Pingqiang Zhou

Integr., 2019

Optimal design of a low-power, phase-switching modulator for implantable medical applications.

[BibT_eX]

[DOI]

Integr., 2019

Eva-CiM: A System-Level Energy Evaluation Framework for Computing-in-Memory Architectures.

[BibT_eX]

[DOI]

CoRR, 2019

Power Delivery Resonant Virus: Concept and Applications.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

The Impact of Emerging Technologies on Architectures and System-level Management: Invited Paper.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Optimizing the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

An Efficient Compressive Convolutional Network for Unified Object Detection and Image Compression.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence, 2019

2018

Floating Random Walk-Based Capacitance Simulation Considering General Floating Metals.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A Multi-Level-Optimization Framework for FPGA-Based Cellular Neural Network Implementation.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2018

A physics-aware methodology for equivalent circuit model extraction of TSV-inductors.

[BibT_eX]

[DOI]

Baixin Chen

Integr., 2018

Modeling and optimization of magnetic core TSV-inductor for on-chip DC-DC converter.

[BibT_eX]

[DOI]

Baixin Chen

Proceedings of the International Conference on Computer-Aided Design, 2018

Noise-aware DVFS transition sequence optimization for battery-powered IoT devices.

[BibT_eX]

[DOI]

Shaoheng Luo

Houle Gan

Proceedings of the 55th Annual Design Automation Conference, 2018

A design framework for processing-in-memory accelerator.

[BibT_eX]

[DOI]

Di Gao

Tianhao Shen

Proceedings of the 20th System Level Interconnect Prediction Workshop, 2018

2017

A routing framework for technology migration with bump encroachment.

[BibT_eX]

[DOI]

Integr., 2017

Accelerating chip design with machine learning: From pre-silicon to post-silicon.

[BibT_eX]

[DOI]

Bei Yu

Di Gao

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

FPGA based cellular neural network optimization: from design space to system.

[BibT_eX]

[DOI]

Proceedings of the Neuromorphic Computing Symposium, 2017

Edge segmentation: Empowering mobile telemedicine with compressed cellular neural networks.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

CN-SIM: A cycle-accurate full system power delivery noise simulator.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bond Testing Data.

[BibT_eX]

[DOI]

Proceedings of the 2016 on International Symposium on Physical Design, 2016

A novel cross-layer framework for early-stage power delivery and architecture co-exploration.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

On the Efficacy of Through-Silicon-Via Inductors.

[BibT_eX]

[DOI]

Rongbo Yang

IEEE Trans. Very Large Scale Integr. Syst., 2015

A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2015

1-Bit Compressed Sensing Based Framework for Built-in Resonance Frequency Prediction Using On-Chip Noise Sensors.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014

Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2014

"Green" On-chip Inductors in Three-Dimensional Integrated Circuits.

[BibT_eX]

[DOI]

Varun Mittapalli

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

An efficient spectral graph sparsification approach to scalable reduction of large flip-chip power grids.

[BibT_eX]

[DOI]

Xueqian Zhao

Zhuo Feng

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Opportunistic through-silicon-via inductor utilization in LC resonant clocks: concept and algorithms.

[BibT_eX]

[DOI]

Varun Mittapalli

Sai Manoj Pudukotai Dinakarrao

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

A zonotoped macromodeling for reachability verification of eye-diagram in high-speed I/O links with jitter.

[BibT_eX]

[DOI]

Hao Yu

Chenjie Gu

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Early-Stage Power Grid Design: Extraction, Modeling and Optimization.

[BibT_eX]

[DOI]

Houle Gan

Wei-Kai Shih

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Through-silicon-via inductor: Is it real or just a fantasy?

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

A Statistical Framework for Post-Fabrication Oxide Breakdown Reliability Prediction and Management.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

An improved benchmark suite for the ISPD-2013 discrete cell sizing contest.

[BibT_eX]

[DOI]

Muhammet Mustafa Ozdal

Proceedings of the International Symposium on Physical Design, 2013

2012

The ISPD-2012 discrete cell sizing contest and benchmark suite.

[BibT_eX]

[DOI]

Muhammet Mustafa Ozdal

Proceedings of the International Symposium on Physical Design, 2012

A silicon-validated methodology for power delivery modeling and simulation.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

Yield Enhancement through Pre- and Post-Silicon Adaptation.

[BibT_eX]

[DOI]

PhD thesis, 2011

Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Improving dual Vt technology by simultaneous gate sizing and mechanical stress optimization.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010

Active learning framework for post-silicon variation extraction and test cost reduction.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Process variation and temperature-aware reliability management.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

Design time body bias selection for parametric yield improvement.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Sensor-Driven Reliability and Wearout Management.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2009

Post-fabrication measurement-driven oxide breakdown reliability prediction and management.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2008

Power Grid Analysis and Optimization Using Algebraic Multigrid.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Variation-aware gate sizing and clustering for post-silicon optimized circuits.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

A statistical approach for full-chip gate-oxide reliability analysis.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

Modeling, optimization and control of rotary traveling-wave oscillator.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

An Improved AMG-based Method for Fast Power Grid Analysis.

[BibT_eX]

[DOI]