Cheng-Yen Lee

Orcid: 0000-0002-1640-1998

According to our database1, Cheng-Yen Lee authored at least 13 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Mixed-Signal Quantized Neural Network Accelerator Using Flash Transistors.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

2023
A Digital Low Dropout (LDO) Voltage Regulator Using Pseudoflash Transistors.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

A Novel Pseudo-Flash Based Digital Low Dropout (LDO) Voltage Regulator.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Named Entity Recognition for Chinese Healthcare Applications.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

Machine Learning of k-Anonymity Data by using Feature Importance and Margin Preservation.
Proceedings of the IEEE Global Conference on Artificial Intelligence and Internet of Things, 2023

A Hardware Validation Framework for a Networked Dynamic Multi-factor Security Protocol.
Proceedings of the 6th International Conference on Advanced Communication Technologies and Networking, 2023

2022
A Flash-based Current-mode IC to Realize Quantized Neural Networks.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
A Series Stacked FinFET Structure for Digital Low Dropout Regulators with Minimum Energy Point Technique for 37.5% Energy Reduction in Cortex M0 Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

NIST-Lite: Randomness Testing of RNGs on an Energy-Constrained Platform.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2019
A High Current efficiency Stacked Digital Low Dropout Array with True-Random-Noise Injection and Ultralow Output Ripple for Power-Side Channel Attack Protection.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A Digital-Type GaN Driver with Current-Pulse-Balancer Technique Achieving Sub-Nanosecond Current Pulse Width for High-Resolution and Dynamic Effective Range LiDAR System.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2016
A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy Saving.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2008
DaVinci: dynamically adaptive virtual networks for a customized internet.
Proceedings of the 2008 ACM Conference on Emerging Network Experiment and Technology, 2008


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