Cheng Li
Orcid: 0000-0002-7232-1255Affiliations:
- University of California, Davis, CA, USA
- University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, Macau (former)
According to our database1,
Cheng Li
authored at least 5 papers
between 2017 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
A Highly Efficient 165-GHz 4FSK 17-Gb/s Transceiver System With Frequency Overlapping Architecture in 65-nm CMOS.
IEEE J. Solid State Circuits, November, 2023
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2018
A 0.19 mm<sup>2</sup> 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2017
60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration.
IEEE J. Solid State Circuits, 2017