Cheng-Hong Tsai

According to our database, Cheng-Hong Tsai authored at least 9 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Slack Redistributed Register Clustering with Mixed-Driving Strength Multi-bit Flip-Flops.

Yen-Yu Chen, Hao-Yu Wu, Iris Hui-Ru Jiang, Cheng-Hong Tsai, Chien-Cheng Wu

Proceedings of the 2024 International Symposium on Physical Design, 2024

Automatic Personality Recognition via XLNet with Refined Highway and Switching Module for Chatbot.

Oscal T.-C. Chen, Cheng-Hong Tsai, Manh-Hung Ha

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

DRC Violation Prediction After Global Route Through Convolutional Neural Network.

Wei-Tse Hung, Yu-Guang Chen, Jhen-Gang Lin, Yun-Wei Yang, Cheng-Hong Tsai, Mango Chia-Tso Chao

IEEE Trans. Very Large Scale Integr. Syst., September, 2023

DRC Violation Prediction with Pre-global-routing Features Through Convolutional Neural Network.

Jhen-Gang Lin, Yu-Guang Chen, Yun-Wei Yang, Wei-Tse Hung, Cheng-Hong Tsai, De-Shiun Fu, Mango Chia-Tso Chao

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2020

Transforming Global Routing Report into DRC Violation Map with Convolutional Neural Network.

Wei-Tse Hung, Jun-Yang Huang, Yih-Chih Chou, Cheng-Hong Tsai, Mango Chia-Tso Chao

Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Dynamic IR-Drop ECO Optimization by Cell Movement with Current Waveform Staggering and Machine Learning Guidance.

Xuan-Xue Huang, Hsien-Chia Chen, Sheng-Wei Wang, Iris Hui-Ru Jiang, Yih-Chih Chou, Cheng-Hong Tsai

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

Clocking for HPC Design: Challenges and Experience Sharing.

Yih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

2017

Generating Routing-Driven Power Distribution Networks With Machine-Learning Technique.

Wen-Hsiang Chang, Chien-Hsueh Lin, Szu-Pang Mu, Li-De Chen, Cheng-Hong Tsai, Yen-Chih Chiu, Mango C.-T. Chao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2007

DFM/DFY practices during physical designs for timing, signal integrity, and power.

Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007