Cheng-Che Ho
According to our database1,
Cheng-Che Ho
authored at least 2 papers
between 2006 and 2007.
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Bibliography
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
2006
A high speed and energy efficient full adder design using complementary & level restoring carry logic.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006