Chen Yang

Orcid: 0000-0002-0383-2705

Affiliations:
  • Beijing Institute of Technology, Beijing Key Laboratory of Embedded Real-time Information Processing Technology, China


According to our database1, Chen Yang authored at least 9 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Implementation of a radix-2<sup>k</sup> fixed-point pipeline FFT processor with optimized word length scheme.
IEICE Electron. Express, 2019

2018
Real-Time Spaceborne Synthetic Aperture Radar Float-Point Imaging System Using Optimized Mapping Methodology and a Multi-Node Parallel Accelerating Technique.
Sensors, 2018

Design and implementation of a multi-channel space-borne SAR imaging system on Vivado HLS.
IEICE Electron. Express, 2018

A novel word length optimization method for radix-2<sup> <i>k</i> </sup> fixed-point FFT.
Sci. China Inf. Sci., 2018

2017
A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.
Sensors, 2017

Area-efficient mixed-radix variable-length FFT processor.
IEICE Electron. Express, 2017

A novel low-overhead fault tolerant parallel-pipelined FFT design.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016
A high-precision hardware-efficient radix-2<sup>k</sup> FFT processor for SAR imaging system.
IEICE Electron. Express, 2016

2014
New quantization error assessment methodology for fixed-point pipeline FFT processor design.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014


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