Chen Liu
Orcid: 0000-0003-0763-2003Affiliations:
- Intel Corporation, USA
- University of Delaware, Department of Electrical and Computer Engineering, Newark, DE, USA (PhD 2016)
According to our database1,
Chen Liu
authored at least 15 papers
between 2014 and 2024.
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Online presence:
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Bibliography
2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
The Power of Telemetry: Uncovering Software-Based Side-Channel Attacks on Apple M1/M2 Systems.
CoRR, 2023
2022
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022
Behavioral Synthesis for Hardware Security, 2022
2021
Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
Methodology of Assessing Information Leakage through Software-Accessible Telemetries.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021
2020
IEEE Trans. Emerg. Top. Comput., 2020
2018
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
Proc. Priv. Enhancing Technol., 2017
2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory.
Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, 2015
2014
Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling.
IEEE Trans. Emerg. Top. Comput., 2014
Improving multilevel PCM reliability through age-aware reading and writing strategies.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Exploiting heterogeneity in MPSoCs to prevent potential trojan propagation across malicious IPs.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Leveraging microarchitectural side channel information to efficiently enhance program control flow integrity.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014