Chen-Ling Chou
According to our database1,
Chen-Ling Chou
authored at least 11 papers
between 2004 and 2011.
Collaborative distances:
Collaborative distances:
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Bibliography
2011
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Run-Time Task Allocation Considering User Behavior in Embedded Multiprocessor Networks-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Contention-aware application mapping for Network-on-Chip communication architectures.
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007
2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004