Chen-Hsin Lien

According to our database, Chen-Hsin Lien authored at least 6 papers between 2004 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories.

Wei Chang, Chun-Hsing Shih, Yan-Xiang Luo, Wen-Fa Wu, Chen-Hsin Lien

Microelectron. Reliab., 2015

Enhanced CDM-robustness for the packaged IC with the extra bonding wire to the die-attach plate.

Tzu-Cheng Kao, Jian-Hsing Lee, Chen-Hsin Lien, Chih-Hsien Wang, Kuang-Cheng Tai, Hung-Der Su

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Robust ESD self-protected LDNMOSFET by an enhanced displacement-current triggering.

Tzu-Cheng Kao, Chen-Hsin Lien, Chien-Wei Chiu, Jian-Hsing Lee, Yen-Hsiang Lo, Chung-Yu Hung, Tsung-Yi Huang, Hung-Der Su

Proceedings of the IEEE International Reliability Physics Symposium, 2015

2013

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes.

Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai

IEEE J. Solid State Circuits, 2013

2011

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability.

Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2004

Design strategy of localized halo profile for achieving sub-50 nm bulk MOSFET.

Chun-Hsing Shih, Yi-Min Chen, Chen-Hsin Lien

Microelectron. Reliab., 2004