Chen-Chia Chang

According to our database, Chen-Chia Chang authored at least 16 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Toward Fully Automated Machine Learning for Routability Estimator Development.

Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Tunhou Zhang, Jiang Hu, Yiran Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits.

Chen-Chia Chang, Yikang Shan, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang

CoRR, 2024

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits.

Chen-Chia Chang, Yikang Shen, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang

Proceedings of the Forty-first International Conference on Machine Learning, 2024

2023

The Dark Side: Security and Reliability Concerns in Machine Learning for EDA.

Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Jiang Hu, Yiran Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research.

Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Yiran Chen

CoRR, 2023

PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions.

Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, Zhiyao Xie

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction.

Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Yaguang Li, Yishuang Lin, Jiang Hu, Yiran Chen

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Rethink before Releasing Your Model: ML Model Extraction Attack in EDA.

Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Jiang Hu, Yiran Chen

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Preplacement Net Length and Timing Estimation by Customized Graph Neural Network.

Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Chen-Chia Chang, Jingyu Pan, Yiran Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

The Dark Side: Security Concerns in Machine Learning for EDA.

Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Yiran Chen

CoRR, 2022

DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters.

Zhiyao Xie, Shiyu Li, Mingyuan Ma, Chen-Chia Chang, Jingyu Pan, Yiran Chen, Jiang Hu

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Robustify ML-Based Lithography Hotspot Detectors.

Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Jiang Hu, Yiran Chen

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Towards collaborative intelligence: routability estimation based on decentralized private data.

Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li, Minxue Tang, Tunhou Zhang, Jiang Hu, Yiran Chen

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

Time-Division Multiplexing Based System-Level FPGA Routing.

Wei-Kai Liu, Ming-Hung Chen, Chia-Ming Chang, Chen-Chia Chang, Yao-Wen Chang

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Automatic Routability Predictor Development Using Neural Architecture Search.

Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2018

A novel dynamic resource adjustment architecture for virtual tenant networks in SDN.

Yi-Wei Ma, Jiann-Liang Chen, Chen-Chia Chang, Akihiro Nakao, Shu Yamamoto

J. Syst. Softw., 2018