Chen-Che Kao

According to our database, Chen-Che Kao authored at least 4 papers between 2015 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization.

Sung-En Hsieh, Chen-Che Kao, Chih-Cheng Hsieh

IEEE J. Solid State Circuits, 2018

2017

A 0.5 V 12-bit SAR ADC using adaptive timedomain comparator with noise optimization.

Chen-Che Kao, Sung-En Hsieh, Chih-Cheng Hsieh

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 0.4V 1.94fJ/conversion-step 10b 750kS/s SAR ADC with input-range-adaptive switching.

Pei-Chen Lee, Chen-Che Kao, Chih-Cheng Hsieh

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

An 8-bit column-shared SAR ADC for CMOS image sensor applications.

Jin-Yi Lin, Kwuang-Han Chang, Chen-Che Kao, Shih-Chin Lo, Yan-Jiun Chen, Pei-Chen Lee, Chi-Hui Chen, Chin Yin, Chih-Cheng Hsieh

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015