Chase Cook
Orcid: 0000-0002-0734-8398
According to our database1,
Chase Cook
authored at least 14 papers
between 2016 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2021
Fast Physics-Based Electromigration Analysis for Full-Chip Networks by Efficient Eigenfunction-Based Solution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
2019
Simulation for Reliability, Hardware Security, and Ising Computing in VLSI Chip Design.
PhD thesis, 2019
Integr., 2019
Reliability based hardware Trojan design using physics-based electromigration models.
Integr., 2019
CoRR, 2019
2018
Fast Electromigration Stress Evolution Analysis for Interconnect Trees Using Krylov Subspace Method.
IEEE Trans. Very Large Scale Integr. Syst., 2018
Fast Electromigration Immortality Analysis for Multisegment Copper Interconnect Wires.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Recent advances in EM and BTI induced reliability modeling, analysis and optimization (invited).
Integr., 2018
Detection of counterfeited ICs via on-chip sensor and post-fabrication authentication policy.
Integr., 2018
Accelerating Electromigration Wear-Out Effects Based on Configurable Sink-Structured Wires.
Proceedings of the 15th International Conference on Synthesis, 2018
2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
2016
Finite difference method for electromigration analysis of multi-branch interconnects.
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Invited - Cross-layer modeling and optimization for electromigration induced reliability.
Proceedings of the 53rd Annual Design Automation Conference, 2016