Charles R. Moore

According to our database, Charles R. Moore authored at least 17 papers between 1974 and 2011.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2011

Power efficiency as the #1 design constraint: technical perspective.

Charles R. Moore

Commun. ACM, 2011

2008

Microarchitecture in the system-level integration era.

Charles R. Moore

Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

2004

TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP.

Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore

ACM Trans. Archit. Code Optim., 2004

Scalable Hardware Memory Disambiguation for High-ILP Processors.

Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler

IEEE Micro, 2004

Managing the Transition from Complexity to Elegance: Design Convergence.

Charles R. Moore

IEEE Micro, 2004

Scaling to the End of Silicon with EDGE Architectures.

Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode

Computer, 2004

2003

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture.

Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore

IEEE Micro, 2003

Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences.

Charles R. Moore, Kevin W. Rudd, Ruby B. Lee, Pradip Bose

IEEE Micro, 2003

Managing the Transition from Complexity to Elegance: Knowing When You Have a Problem.

Charles R. Moore

IEEE Micro, 2003

Microprocessor pipeline energy analysis.

Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Exploiting Microarchitectural Redundancy For Defect Tolerance.

Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

1994

Design considerations for the PowerPC 601 microprocessor.

Michael T. Vaden, Lawrence J. Merkel, Charles R. Moore, Terence M. Potter, Robert James Reese

IBM J. Res. Dev., 1994

The PowerPC Alliance.

Charles R. Moore, Russell C. Stanphill

Commun. ACM, 1994

1993

The Power PC 601 microprocessor.

Michael C. Becker, Michael S. Allen, Charles R. Moore, John S. Muhich, David P. Tuttle

IEEE Micro, 1993

1992

IBM Single Chip RISC Processor (RSC).

Charles R. Moore, D. M. Balser, John S. Muhich, R. E. East

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1990

IBM second-generation RISC machine organization.

H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan

Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1974

Character string manipulation in APL.

Charles R. Moore

Proceedings of the sixth international conference on APL, 1974