Charles H. Stapper

According to our database, Charles H. Stapper authored at least 17 papers between 1976 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of two.

1995

Multipurpose DRAM architecture for optimal power, performance, and product flexibility.

Wayne F. Ellis, John E. Barth Jr., Sri Divakaruni, Jeffrey H. Dreibelbis, Anatol Furman, Erik L. Hedberg, Hsing-San Lee, Thomas M. Maffitt, Christopher P. Miller, Charles H. Stapper, Howard L. Kalter

IBM J. Res. Dev., 1995

1994

A statistical study of defect maps of large area VLSI IC's.

Israel Koren, Zahava Koren, Charles H. Stapper

IEEE Trans. Very Large Scale Integr. Syst., 1994

On Fractal Yield Models: A Statistical Paradox.

Charles H. Stapper, A. J. Rideout

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994

1993

Improved Yield Models for Fault-Tolerant Memory Chips.

Charles H. Stapper

IEEE Trans. Computers, 1993

A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits.

Israel Koren, Zahava Koren, Charles H. Stapper

IEEE Trans. Computers, 1993

Yield Model for ASIC and Processor Chips.

Charles H. Stapper, J. A. Patrick, R. J. Rosner

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

1992

Synergistic Fault-Tolerance for Memory Chips.

Charles H. Stapper, Hsing-San Lee

IEEE Trans. Computers, 1992

A New Statistical Approach for Fault-Tolerant VLSI Systems.

Charles H. Stapper

Proceedings of the Digest of Papers: FTCS-22, 1992

1991

Statistics associated with spatial fault simulation used for evaluating integrated circuit yield enhancement.

Charles H. Stapper

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

1989

Simulation of spatial fault distributions for integrated circuit yield estimations.

Charles H. Stapper

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Large-Area Fault Clusters and Fault Tolerance in VLSI Circuits: A Review.

Charles H. Stapper

IBM J. Res. Dev., 1989

1986

Yield of VLSI circuits: myths vs. reality (panel).

Andrzej J. Strojwas, Clark Beck, Dennis Buss, Tülin Erdim Mangir, Charles H. Stapper

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1984

Yield Model for Fault Clusters Within Integrated Circuits.

Charles H. Stapper

IBM J. Res. Dev., 1984

Modeling of Defects in Integrated Circuit Photolithographic Patterns.

Charles H. Stapper

IBM J. Res. Dev., 1984

1983

Modeling of Integrated Circuit Defect Sensitivities.

Charles H. Stapper

IBM J. Res. Dev., 1983

1980

Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good Product.

Charles H. Stapper, A. N. McLaren, M. Dreckmann

IBM J. Res. Dev., 1980

1976

LSI Yield Modeling and Process Monitoring.

Charles H. Stapper

IBM J. Res. Dev., 1976