Charles A. Zukowski

According to our database, Charles A. Zukowski authored at least 28 papers between 1985 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Characteristics of MS-CMOS logic in sub-32nm technologies.

Kagan Irez, Jiaping Hu, Charles A. Zukowski

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2006

A Low-Leakage High-Speed Monotonic Static CMOS 64b Adder in a Dual Gate Oxide 65-nm CMOS Technology.

Ali Bastani, Charles A. Zukowski

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Monotonic static CMOS tradeoffs in sub-100nm technologies.

Ali Bastani, Charles A. Zukowski

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005

Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies.

Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky

Integr., 2005

Characterization of monotonic static CMOS gates in a 65nm technology.

Ali Bastani, Charles A. Zukowski

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

Characterization of logic circuit techniques for high leakage CMOS technologies.

Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Design of superbuffers in sub-100nm CMOS technologies with significant gate leakage.

Ali Bastani, Charles A. Zukowski

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

A custom FPGA for the simulation of gene regulatory networks.

Ilias Tagkopoulos, Charles A. Zukowski, German Cavelier, Dimitris Anastassiou

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2000

An assessment of on-line engineering design problem presentation strategies.

Anthony A. Renshaw, Joshua H. Reibel, Charles A. Zukowski, Katie Penn, Robert O. McClintock, Morton B. Friedman

IEEE Trans. Educ., 2000

Application of dynamic power supply scaling in a low-energy ATM interface.

S. Henry Li, Charles A. Zukowski

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Accuracy management for mixed-mode digital VLSI simulation.

Gary L. Dare, Charles A. Zukowski

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1996

VLSI Design Optimization of Input/Output-Buffered Broadband ATM Switches.

Hong Shi, Charles A. Zukowski, Omar Wing

Proceedings of the Proceedings IEEE INFOCOM '96, 1996

CMOS Transistor Sizing for Minimization of Energy-Delay Product.

Christophe Tretz, Charles A. Zukowski

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Buffer size trade-offs in input/output buffered ATM switches under various conditions.

Hong Shi, Naeem Abbasi, Charles A. Zukowski, Omar Wing

Proceedings of the 4th International Conference on Computer Communications and Networks (ICCCN '95), 1995

1994

Generic Queue Scheduling: Concepts and VLSI.

Paul Landsberg, Charles A. Zukowski

Proceedings of the Proceedings IEEE INFOCOM '94, 1994

Delay-time bounds and waveform bounds for RLCG ladder networks.

Ying-Wen Bai, Charles A. Zukowski

Proceedings of the Proceedings 27th Annual Simulation Symposium, 1994

1993

Jitter Due to Signal History in Digital Logic Circuits and Its Control Strategies.

Perng-Shyong Lin, Charles A. Zukowski

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Analysis and Control of Timing Jitter in Digital Logic Arising from Noise Voltage Sources.

Perng-Shyong Lin, Charles A. Zukowski

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1992

High-speed parallel CRC circuits in VLSI.

Tong-Bi Pei, Charles A. Zukowski

IEEE Trans. Commun., 1992

Putting routing tables in silicon.

Tong-Bi Pei, Charles A. Zukowski

IEEE Netw., 1992

Implementing a High-Frequency Pattern Generator Based on Combinational Merging.

Charles A. Zukowski, Ying-Wen Bai

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1991

VLSI Implementation of Routing Tables: Tries and CAMs.

Tong-Bi Pei, Charles A. Zukowski

Proceedings of the Proceedings IEEE INFOCOM '91, 1991

1990

Measuring Error Propagation in Waveform Relaxation Algorithms.

Charles A. Zukowski, George Gristede, Albert E. Ruehli

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1988

Continuous Models for Communication Density Constraints on Multiprocessor Performance.

Lance A. Glasser, Charles A. Zukowski

IEEE Trans. Computers, 1988

A matched-delay CMOS TDM multiplexer cell.

Charles A. Zukowski, Kevin Shum

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

Variable reduction in MOS timing models.

Charles A. Zukowski, De-Ping Chen

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1986

Relaxing Bounds for Linear RC Mesh Circuits.

Charles A. Zukowski

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986

1985

Integrated-Circuit Logarithmic Arithmetic Units.

Jeffrey H. Lang, Charles A. Zukowski, Richard O. LaMaire, Chae H. An

IEEE Trans. Computers, 1985