Chaoming Liu
Orcid: 0000-0002-7617-4723
According to our database1,
Chaoming Liu
authored at least 14 papers
between 2017 and 2024.
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Bibliography
2024
A High-Performance Quadruple-Node-Upset-Tolerant Latch Design and an Algorithm for Tolerance Verification of Hardened Latches.
J. Electron. Test., February, 2024
Hardened latch designs based on the characteristic of transistor for mitigating multiple-node-upsets in harsh radiation environments.
Microelectron. J., January, 2024
Integr., 2024
2023
LQNTL: Low-overhead quadruple-node-upset self-recovery latch based on triple-mode redundancy.
Integr., 2023
CoRR, 2023
2022
Proceedings of the 46th IEEE Annual Computers, Software, and Applications Conferenc, 2022
2021
Inf. Process. Manag., 2021
Sci. China Inf. Sci., 2021
Incorporating Syntactic and Phonetic Information into Multimodal Word Embeddings Using Graph Convolutional Networks.
Proceedings of the IEEE International Conference on Acoustics, 2021
2020
Learning Multimodal Word Representations by Explicitly Embedding Syntactic and Phonetic Information.
IEEE Access, 2020
2018
Microelectron. Reliab., 2018
Synergistic effects of NPN transistors caused by combined proton irradiations with different energies.
Microelectron. Reliab., 2018
Simulation study of single event effects in the SiC LDMOS with a step compound drift region.
Microelectron. Reliab., 2018
2017
Impact of Passivation Layers on Irradiation Response of PNP Transistors Under Different Dose Rates.
IEEE Access, 2017