Chao-Hsiang Wang

According to our database, Chao-Hsiang Wang authored at least 3 papers between 2008 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Low-Active-Energy and Low-Standby-Power Sub-threshold ROM for IoT Edge Sensing Systems.

Jinn-Shyan Wang, Chien-Tung Liu, Chao-Hsiang Wang

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

2008

Efficient VLSI Design of Residue-to-Binary Converter for the Moduli Set (2^<i>n</i>, 2^<i>n</i>+1 - 1, 2^<i>n</i> - 1).

Su-Hon Lin, Ming-Hwa Sheu, Chao-Hsiang Wang

IEICE Trans. Inf. Syst., 2008

Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2ⁿ, 2ⁿ⁺¹-1, 2ⁿ-1).

Su-Hon Lin, Ming-Hwa Sheu, Chao-Hsiang Wang, Yuan-Ching Kuo

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008