Chao-Ching Cheng

According to our database, Chao-Ching Cheng authored at least 4 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

On the Extreme Scaling of Transistors with Monolayer MOS2 Channel.

Wen-Chia Wu, Terry Y. T. Hung, D. Mahaveer Sathaiya, Edward Chen, Chen-Feng Hsu, Walker Yun, Hsiang-Chi Hu, Bo-Heng Liu, T. Y. Lee, Chi-Chung Kei, Wen-Hao Chang, Jin Cai, W. Jeff, Chung-Cheng Wu, H.-S. Philip Wong, Chao-Hsin Chien, Chao-Ching Cheng, Iuliana P. Radu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

Scaled contact length with low contact resistance in monolayer 2D channel transistors.

Wen-Chia Wu, Terry Y. T. Hung, D. Mahaveer Sathaiya, Dongxu Fan, Goutham Arutchelvan, Chen-Feng Hsu, Sheng-Kai Su, Ang-Sheng Chou, Edward Chen, Weisheng Li, Zhihao Yu, Hao Qiu, Ying-Mei Yang, Kuang-I Lin, Yun-Yang Shen, Wen-Hao Chang, San Lin Liew, Vincent D.-H. Hou, Jin Cai, Chung-Cheng Wu, Jeff Wu, H.-S. Philip Wong, Xinran Wang, Chao-Hsin Chien, Chao-Ching Cheng, Iuliana P. Radu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

Perspective on Low-dimensional Channel Materials for Extremely Scaled CMOS.

Sheng-Kai Su, Edward Chen, Terry Y. T. Hung, Meng-Zhan Li, Gregory Pitner, Chao-Ching Cheng, Han Wang, Jin Cai, H.-S. Philip Wong, Iuliana P. Radu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Wafer-Scale Bi-Assisted Semi-Auto Dry Transfer and Fabrication of High-Performance Monolayer CVD WS2 Transistor.

Ming-Yang Li, Ching-Hao Hsu, Shin-Wei Shen, Ang-Sheng Chou, Yuxuan Cosmi Lin, Chih-Piao Chuu, Ning Yang, Sui-An Chou, Lin-Yun Huang, Chao-Ching Cheng, Wei-Yen Woon, Szuya Liao, Chih-I Wu, Lain-Jong Li, Iuliana P. Radu, H.-S. Philip Wong, Han Wang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022