Chantal Robach

According to our database1, Chantal Robach authored at least 67 papers between 1975 and 2010.

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Bibliography

2010
Testability Analysis Integrated into Scicos Development Environment.
Proceedings of the 2010 IEEE RIVF International Conference on Computing & Communication Technologies, 2010

2009
Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application.
IET Comput. Digit. Tech., 2009

2008
Choice of a High-Level Fault Model for the Optimization of Validation Test Set Reused for Manufacturing Test.
VLSI Design, 2008

Decreasing Test Qualification Time in AMS and RF Systems.
IEEE Des. Test Comput., 2008

A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application.
Proceedings of the Second International Symposium on Networks-on-Chips, 2008

2007
Impact of hardware emulation on the verification quality improvement.
Proceedings of the IFIP VLSI-SoC 2007, 2007

Qualification of behavioral level design validation for AMS & RF SoCs.
Proceedings of the IFIP VLSI-SoC 2007, 2007

Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip.
Proceedings of the First International Symposium on Networks-on-Chips, 2007

Functional Verification of RTL Designs driven by Mutation Testing metrics.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006
A DFT Architecture for Asynchronous Networks-on-Chip.
Proceedings of the 11th European Test Symposium, 2006

Design-for-Test of Asynchronous Networks-on-Chip.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

How to Improve a Set of Design Validation Data by Using Mutation-based Test.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Behavioral Modeling of WCDMA Transceiver with VHDL-AMS Language.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
Mutation Sampling Technique for the Generation of Structural Test Data.
Proceedings of the 2005 Design, 2005

2004
Testability Analysis of Data-Flow Software.
Proceedings of the International Workshop on Test and Analysis of Component Based Systems, 2004

A testability analysis for data-flow designs of reactive real-time systems.
Proceedings of the IASTED Conference on Software Engineering and Applications, 2004

2003
From diagnosis to diagnosability: axiomatization, measurement and application.
J. Syst. Softw., 2003

Analyse de la Testabilité des Logiciels Flots de Données Synchrones.
Proceedings of the Actes de la Première Conférence Internationale RIVF'03 Rencontres en Informatique Vietnam-France, 2003

Testability Analysis Applied to Embedded Data-flow Software.
Proceedings of the 3rd International Conference on Quality Software (QSIC 2003), 2003

Testing Criteria for Data Flow Software.
Proceedings of the 10th Asia-Pacific Software Engineering Conference (APSEC 2003), 2003

2002
Diagnosis Strategies for Hardware or Software Systems.
J. Electron. Test., 2002

Testability Analysis for Software Components.
Proceedings of the 18th International Conference on Software Maintenance (ICSM 2002), 2002

2001
System level diagnosis - a comparison of two alternative approaches.
Proceedings of the 6th European Test Workshop, 2001

2000
Inserting Scan at the Behavioral Level.
IEEE Des. Test Comput., 2000

Analyzing Testability on Data Flow Designs.
Proceedings of the 11th International Symposium on Software Reliability Engineering (ISSRE 2000), 2000

A methodology for validating digital circuits with mutation testing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
From Design Validation to Hardware Testing: A Unified Approach.
J. Electron. Test., 1999

An Experimental Comparison of Software Diagnosis Methods.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
Performance Evaluation of Distributed Diagnosis Algorithms in Parallel Systems.
Parallel Comput., 1998

An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
J. Electron. Test., 1998

Off-Line Diagnosis of Parallel Systems.
Proceedings of the Seventeenth Symposium on Reliable Distributed Systems, 1998

Towards an automatic diagnosis for high-level design validation.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

On-line testing of scalable signal processing architectures using a software test method.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Software diagnosability.
Proceedings of the Ninth International Symposium on Software Reliability Engineering, 1998

1997
Impact of System Partitioning on Test Cost.
IEEE Des. Test Comput., 1997

Hardware Test: Can We Learn from Software Testing?
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Testability Measurements for Data Flow Designs.
Proceedings of the 4th IEEE International Software Metrics Symposium (METRICS 1997), 1997

Self-Healing Mechanisms in ATM Networks: The Role of Virtual Path Management Functions.
Proceedings of the 1997 IEEE International Conference on Communications: Towards the Knowledge Millennium, 1997

Diagnosis and time-out based escalation strategies for ATM networks.
Proceedings of the 23rd EUROMICRO Conference '97, 1997

Concurrent testing of VLSI digital signal processors using mutation based testing.
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

1996
System-Diagnosis of Cluster-Based Parallel Architectures.
Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996

Testability-Oriented Hardware/Software Partitioning.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

From Specification Validation to Hardware Testing: A Unified Method.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Considering Test Economics in the Process of Hardware/Software Partitioning.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

Performance Evaluation of Testing Strategies in Parallel Systems.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

1995
Host-Diagnosis of Parallel Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1995

A Diagnosis Strategy for Cluster-Based Parallel Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1995

From Hardware to Software Testability.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

A Routing Testing of a VLSI Massively Parallel Machine Based on IEEE 1149.1.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Towards a unified approach to the testability of co-designed systems.
Proceedings of the Sixth International Symposium on Software Reliability Engineering, 1995

Testability analysis of co-designed systems.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

Distributed off-line testing of parallel systems.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994
Distributed validation of massively parallel machines.
Proceedings of the International Symposium on Parallel Architectures, 1994

Fault-Tolerant Routing Algorithms for a Massively Parallel Machine.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Design and Test of a Massively Parallel Architecture.
Proceedings of the Massively Parallel Processing Applications and Develompent, 1994

1993
Memory testing in a massively parallel machine.
Microprocess. Microprogramming, 1993

Functional Testing and Reconfiguration of MIMD Machines.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

1989
Knowledge-based functional specification of test and maintenance programs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

1988
Testability measures: A Review.
Comput. Syst. Sci. Eng., 1988

1984
CATA: A Computer-Aided Test Analysis System.
IEEE Des. Test, 1984

1983
Computer Aided Testability Evaluation and Test Generation.
Proceedings of the Proceedings International Test Conference 1983, 1983

1979
Test et testabilité de systèmes informatiques.
, 1979

1978
Dynamic Testing of Control Units.
IEEE Trans. Computers, 1978

1976
Processor Testability and Design Consequences.
IEEE Trans. Computers, 1976

1975
Méthodologie de test de processeurs : impacts sur la conception.
PhD thesis, 1975

Diversified Test Methods for Local Control Units.
IEEE Trans. Computers, 1975


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