Chanhee Oh

According to our database1, Chanhee Oh authored at least 28 papers between 1989 and 2006.

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Bibliography

2006
Impact of stress-induced backflow on full-chip electromigration risk assessment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005
Leakage Current Modeling in PD SOI Circuits.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Pessimism reduction in crosstalk noise aware STA.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004
Crosstalk noise control in an SoC physical design flow.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Postroute gate sizing for crosstalk noise reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Delay noise pessimism reduction by logic correlations.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

False-Noise Analysis for Domino Circuits.
Proceedings of the 2004 Design, 2004

2003
Driver modeling and alignment for worst-case delay noise.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Static electromigration analysis for on-chip signal interconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Static Electromigration Analysis for Signal Interconnects.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Signal integrity management in an SoC physical design flow.
Proceedings of the 2003 International Symposium on Physical Design, 2003

Post-route gate sizing for crosstalk noise reduction.
Proceedings of the 40th Design Automation Conference, 2003

2002
Duet: an accurate leakage estimation and optimization tool for dual-V<sub>t</sub> circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Noise Injection and Propagation in High Performance Designs.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

False-Noise Analysis Using Resolution Method.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Noise propagation and failure criteria for VLSI designs.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
A Global Driver Sizing Tool for Functional Crosstalk Noise Avoidance.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

False-Noise Analysis using Logic Implications.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Driver Modeling and Alignment for Worst-Case Delay Noise.
Proceedings of the 38th Design Automation Conference, 2001

2000
Slope Propagation in Static Timing Analysis.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

ClariNet: a noise analysis tool for deep submicron design.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Emerging power management tools for processor design.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

1996
Efficient logic-level timing analysis using constraint-guided critical path search.
IEEE Trans. Very Large Scale Integr. Syst., 1996

1995
Improved sequential ATPG using functional observation information and new justification methods.
Proceedings of the 1995 European Design and Test Conference, 1995

1994
Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1989
Integrated modelling of thermal and visual image generation.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1989


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